Publication: Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS
Date
2016
Authors
Atan N.
Ahmad I.
Majlis B.Y.
Azle M.F.
Journal Title
Journal ISSN
Volume Title
Publisher
EDP Sciences
Abstract
Manufacturing a 18-nm transistor requires a variety of parameters, materials, temperatures, and methods. In this research, HfO2 was used as the gate dielectric ad TiO2 was used as the gate material. The transistor HfO2/TiSi2 18-nm PMOS was invented using SILVACO TCAD. Ion implantation was adopted in the fabrication process for the method's practicality and ability to be used to suppress short channel effects. The study involved ion implantation methods: compensation implantation, halo implantation energy, halo tilt, and source-drain implantation. Taguchi method is the best optimization process for a threshold voltage of HfO2/TiSi2 18-nm PMOS. In this case, the method adopted was Taguchi orthogonal array L9. The process parameters (ion implantations) and noise factors were evaluated by examining the Taguchi's signal-to-noise ratio (SNR) and nominal-the-best for the threshold voltage (VTH). After optimization, the result showed that the VTH value of the 18-nm PMOS device was-0.291339. � 2016 The Authors, published by EDP Sciences.
Description
Gate dielectrics; Hafnium oxides; Ion implantation; Ions; Manufacture; Taguchi methods; Threshold voltage; Compensation implantations; Fabrication process; Halo implantation; Ion implantation methods; Optimization of process parameters; Process parameters; Short-channel effect; Taguchi orthogonal arrays; Signal to noise ratio