Publication:
Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design

Simple item page
dc.contributor.authorRoslan A.F.en_US
dc.contributor.authorSalehuddin F.en_US
dc.contributor.authorZain A.S.M.en_US
dc.contributor.authorKaharudin K.E.en_US
dc.contributor.authorAhmad I.en_US
dc.contributor.authorHazura H.en_US
dc.contributor.authorHanim A.R.en_US
dc.contributor.authorIdris S.K.en_US
dc.contributor.authorHamid A.M.A.en_US
dc.contributor.authorid57203514087en_US
dc.contributor.authorid36239165300en_US
dc.contributor.authorid55925762500en_US
dc.contributor.authorid56472706900en_US
dc.contributor.authorid12792216600en_US
dc.contributor.authorid35108985200en_US
dc.contributor.authorid57193616206en_US
dc.contributor.authorid57202632295en_US
dc.contributor.authorid36570222300en_US
dc.date.accessioned2023-05-29T08:09:13Z
dc.date.available2023-05-29T08:09:13Z
dc.date.issued2020
dc.descriptionDesign; FinFET; Leakage currents; Polysilicon; Surface properties; Threshold voltage; Central composite designs; International Technology Roadmap for Semiconductors; Optimization of process parameters; Optimization techniques; Process parameters; Response surface method; Response surface methodology; Sub-threshold swing(ss); Semiconductor dopingen_US
dc.description.abstractA 16 nm double-gate FinFET (DG-FinFET) designed are optimized with a mathematical modelling using a response surface method-central composite design (RSM-CCD), with the relationship between parameters and output responses are investigated and examined. The threshold voltage (VTH), drive current (ION), leakage current (IOFF) and subthreshold swing (SS) ramifications towards the adjustment of six process parameter that integrates polysilicon doping dose, polysilicon doping tilt, Source/Drain doping dose, Source/Drain doping tilt, VTH doping dose and VTH doping tilt is studied using the RSM-CCD using half-factorial of 86 experimental runs, which totals to 52 runs, consisting of 8 centre points, 12 axial points, and 32 factorials. Ultimately, the VTH after the result is optimized with RSM-CCD showcased an improvement at 0.1785 V, with IOFF achieved at 958.71 pA/?m despite performing less favourably after optimized. That said, an improvement towards ION/IOFF ratio at 2.049�106 compared to 1.666�106 proves that both optimization techniques have met the predictions of International Technology Roadmap for Semiconductors (ITRS) 2013. � 2020 IOP Publishing Ltd. All rights reserved.en_US
dc.description.natureFinalen_US
dc.identifier.ArtNo12042
dc.identifier.doi10.1088/1742-6596/1502/1/012042
dc.identifier.issue1
dc.identifier.scopus2-s2.0-85087105870
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85087105870&doi=10.1088%2f1742-6596%2f1502%2f1%2f012042&partnerID=40&md5=81bbfc0d3d8a32e9a0843af87664eaa1
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/25422
dc.identifier.volume1502
dc.publisherInstitute of Physics Publishingen_US
dc.relation.ispartofAll Open Access, Gold
dc.sourceScopus
dc.sourcetitleJournal of Physics: Conference Series
dc.titleOptimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Designen_US
dc.typeConference Paperen_US
dspace.entity.typePublication
Files
Collections
SCOPUS