Publication: Simulation of fault current limiter in reducing fault current
| dc.contributor.author | Muhammad Faizal Bin Baili | en_US |
| dc.date.accessioned | 2023-05-03T17:31:08Z | |
| dc.date.available | 2023-05-03T17:31:08Z | |
| dc.date.issued | 2020-02 | |
| dc.description | TK3226.F35 2020 | |
| dc.description.abstract | Increasing electricity power demand leads to increasing electrical loads in power system network. A significant rise in fault current may introduced to power systems that have been stretched to their designed capacity. Fault current levels which exceed the systems rating can cause severe impact to the electrical facilities. Alternatively, increasing fault current levels can be mitigate by implementation of Fault Current Limiter (FCL) in the power system networks. FCL is more likely to infiltrate into medium and low voltage power system network to lower the capacity of electric devices and improve their stability. In other to contribute to the effective development of FCL, it is essential to study the ability of FCL through simulations regarding its performance and applicability from the system point of view. In this research two FCL models are designed in MATLAB Simulink based on the parameter from past researches. This research first introduces the Resistive Superconductor Fault Current Limiter (RSFCL) model and the Solid-State Fault Current Limiter (SSFCL) model in MATLAB Simulink and then simulates several cases with and without the implementation of FCL in the designed test systems. The study shows that both FCL models capable to reduce the magnitude of fault current with the RSFCL shows higher reduction percentage than SSFCL. Performances of FCL not only determined through its fault current reduction ability but also its effect to the system stability, power quality and reliability by reducing the fault current instantaneously. | en_US |
| dc.identifier.uri | https://irepository.uniten.edu.my/handle/123456789/21641 | |
| dc.language.iso | en | en_US |
| dc.subject | Fault Current Limiter | en_US |
| dc.subject | Current Limiting | en_US |
| dc.subject | Simulation | en_US |
| dc.title | Simulation of fault current limiter in reducing fault current | |
| dc.type | Resource Types::text::Final Year Project | |
| dspace.entity.type | Publication | |
| oaire.citation.endPage | 65 | |
| oaire.citation.startPage | 1 |