Publication:
Power Electronics Building Block (PEBB) hardware design and reliability prediction

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dc.citedby5
dc.contributor.authorToh C.L.en_US
dc.contributor.authorWong Y.M.en_US
dc.contributor.authorNorum L.E.en_US
dc.contributor.authorid8690228000en_US
dc.contributor.authorid57194947416en_US
dc.contributor.authorid6701577565en_US
dc.date.accessioned2023-05-29T06:38:14Z
dc.date.available2023-05-29T06:38:14Z
dc.date.issued2017
dc.descriptionArchitectural design; Failure analysis; Hardware; Power converters; Power electronics; Reliability; Reliability analysis; Software design; Stress analysis; Communication interface; Failure rate; Hardware and software designs; Modular multilevel converters; Power Electronics Building Blocks; Power electronics converters; Reliability block diagrams; Reliability prediction; Outagesen_US
dc.description.abstractPower Electronics Building Block (PEBB) concept has been proposed to simplify the conventional design process and reduce engineering efforts. The main idea of PEBB is to standardize the hardware and software design. A PEBB hardware is a power processor which integrates different groups of hardware components such as power semiconductors, sensing measurements and communication interface elements. Different range of power converters can be constructed easily by connecting a number of identical PEBBs in series and/or parallel. However, failure of a PEBB will degrade the reliability level of these converters. To prevent system breakdown, the life span of a PEBB hardware must be estimated so that maintenance works can be planned ahead. Therefore, this paper demonstrates part stress analysis to estimate a useful-life-cycle (Mean Time To Failure) of a well-developed PEBB hardware prototype. This PEBB has been used to construct a small-scaled modular multilevel converter for laboratory testing. Full reliability block diagram analysis and simplification techniques are enclosed. � 2016 IEEE.en_US
dc.description.natureFinalen_US
dc.identifier.ArtNo7951553
dc.identifier.doi10.1109/PECON.2016.7951553
dc.identifier.epage171
dc.identifier.scopus2-s2.0-85024403514
dc.identifier.spage166
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85024403514&doi=10.1109%2fPECON.2016.7951553&partnerID=40&md5=861b1a6206c9161c229a4f016c0e3c18
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/23180
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceScopus
dc.sourcetitlePECON 2016 - 2016 IEEE 6th International Conference on Power and Energy, Conference Proceeding
dc.titlePower Electronics Building Block (PEBB) hardware design and reliability predictionen_US
dc.typeConference Paperen_US
dspace.entity.typePublication
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