Publication:
Cobalt silicide and titanium silicide effects on nano devices

Simple item page
dc.citedby8
dc.contributor.authorElgomati H.A.en_US
dc.contributor.authorMajlis B.Y.en_US
dc.contributor.authorSalehuddin F.en_US
dc.contributor.authorAhmad I.en_US
dc.contributor.authorZaharim A.en_US
dc.contributor.authorHamid F.A.en_US
dc.contributor.authorid36536722700en_US
dc.contributor.authorid6603071546en_US
dc.contributor.authorid36239165300en_US
dc.contributor.authorid12792216600en_US
dc.contributor.authorid15119466900en_US
dc.contributor.authorid6603573875en_US
dc.date.accessioned2023-12-28T07:05:43Z
dc.date.available2023-12-28T07:05:43Z
dc.date.issued2011
dc.description.abstractThis paper describes growth process of the two silicide Sub-nanometer devices and the different effects of having cobalt silicide and titanium silicide on a Sub-nanometer CMOS devices. On the top of CMOS device gate, metal silicide is developed on-top of the polysilicon to produce an ohmic contact between the polysilicon and aluminum wire. The ohmic contact should be better compared to metal-polysilicon borders. This silicide has been widely used to reduce resistance of polysilicon gates. Metal silicides such as titanium silicide (TiSi 2), tungsten salicide (WSi 2), cobalt salicide (CoSi 2) andnickel salicide (NiSi 2) are widely used for this purpose. These metals react with polysilicon, to form metal silicide layer that possesses better physical and electrical properties to interface with aluminium. The silicide need to be optimally annealed in order to obtain a good ratio of metal silicide to silicon in the gate structure Titanium silicide is formed by depositing PVD Ti on silicon substrates followed by annealing process. Anneals were carried out in an N2 ambient and resulted in a thin TiN layer on the silicide surface. For cobalt cilicide, a CVD cobalt layer was deposited on-top silicon at 450C, and after annealing the structure, Co 2Si phase was formed. And at 800C the high resistivity CoSi phase formed. As we continued to increase the anneal temperature to 950C, CoSi 2 layer is formed. The high temperature required to form a silicide and the non existence of the Co 2Si phase are attributed to the oxide at the interface. It is found that cobalt silicide grew faster and deeper to the silicon, thus saving a lot of time and cost. The succeding experiments also show that cobalt silicide has better electrical properties such as sheet resistance, capacitance and electron mobility. The transistor fabrication process was simulated by using Silvaco ATHENA module and the resulting electrical characterization was simulated using ATLAS module. � 2011 IEEE.en_US
dc.description.natureFinalen_US
dc.identifier.ArtNo6088344
dc.identifier.doi10.1109/RSM.2011.6088344
dc.identifier.epage285
dc.identifier.scopus2-s2.0-83755196481
dc.identifier.spage282
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-83755196481&doi=10.1109%2fRSM.2011.6088344&partnerID=40&md5=15b84bb8bc158f58aa5aa6aa60913d77
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/29583
dc.pagecount3
dc.sourceScopus
dc.sourcetitle2011 IEEE Regional Symposium on Micro and Nanoelectronics, RSM 2011 - Programme and Abstracts
dc.subjectcobalt silicide
dc.subjectnanometer
dc.subjectNMOS
dc.subjectSilicide
dc.subjecttitanium silicide
dc.subjectAluminum
dc.subjectAnnealing
dc.subjectCarbon dioxide
dc.subjectCMOS integrated circuits
dc.subjectCobalt
dc.subjectCobalt compounds
dc.subjectElectric contactors
dc.subjectElectric properties
dc.subjectElectron mobility
dc.subjectMetals
dc.subjectOhmic contacts
dc.subjectPolysilicon
dc.subjectTitanium
dc.subjectTitanium nitride
dc.subjectTungsten
dc.subjectWire
dc.subjectAluminum wires
dc.subjectAnneal temperatures
dc.subjectAnnealing process
dc.subjectCMOS devices
dc.subjectCobalt layers
dc.subjectCobalt salicide
dc.subjectCobalt silicide
dc.subjectDifferent effects
dc.subjectElectrical characterization
dc.subjectFabrication process
dc.subjectGate structure
dc.subjectGrowth process
dc.subjectHigh resistivity
dc.subjectHigh temperature
dc.subjectMetal silicide
dc.subjectN2 ambient
dc.subjectNano device
dc.subjectnanometer
dc.subjectNMOS
dc.subjectNon-existence
dc.subjectPolysilicon gates
dc.subjectSalicides
dc.subjectSilicide surfaces
dc.subjectSilicon substrates
dc.subjectSilvaco
dc.subjectThin tin
dc.subjecttitanium silicide
dc.subjectSilicides
dc.titleCobalt silicide and titanium silicide effects on nano devicesen_US
dc.typeConference Paperen_US
dspace.entity.typePublication
Files
Collections
SCOPUS