Publication:
Design of a 4-bit adder using reversible logic in quantum-dot cellular automata (QCA)

dc.citedby28
dc.contributor.authorKunalan D.en_US
dc.contributor.authorCheong C.L.en_US
dc.contributor.authorChau C.F.en_US
dc.contributor.authorGhazali A.B.en_US
dc.contributor.authorid56395450700en_US
dc.contributor.authorid56395026200en_US
dc.contributor.authorid25824209000en_US
dc.contributor.authorid36441299400en_US
dc.date.accessioned2023-05-16T02:45:42Z
dc.date.available2023-05-16T02:45:42Z
dc.date.issued2014
dc.description.abstractBoth quantum-dot cellular automata (QCA) and reversible logic are emerging technologies that are promising alternatives to overcoming the scaling and heat dissipation issues, respectively, in the current CMOS designs. Here, the fundamentals of QCA and reversible logic are studied; the feasibility of incorporating reversible logic in QCA designs is also demonstrated. Based on two existing designs, an improved version of the reversible gates, namely the Feynman Gate and the Toffoli Gate, were implemented in QCA technology using QCADesigner. The proposed design of the QCA-based Feynman Gate is faster by 1/2 cycle as compared to the existing design; while the proposed Toffoli Gate has the same latency as the existing design but it is readily to be cascaded into a more complex design. A 4-bit ripple carry adder in QCA is then designed using the proposed Feynman and Toffoli gates to realize a reversible QCA full adder. This 4-bit QCA adder with reversible logic consists of 2030 QCA cells, has a latency of 7 clock cycles and 8 garbage outputs. © 2014 IEEE.en_US
dc.description.natureFinalen_US
dc.identifier.ArtNo6920795
dc.identifier.doi10.1109/SMELEC.2014.6920795
dc.identifier.epage63
dc.identifier.scopus2-s2.0-84908253661
dc.identifier.spage60
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-84908253661&doi=10.1109%2fSMELEC.2014.6920795&partnerID=40&md5=57e8b5d665e80cd430c2df4904f79a72
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/21849
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceScopus
dc.sourcetitleIEEE International Conference on Semiconductor Electronics, Proceedings, ICSE
dc.titleDesign of a 4-bit adder using reversible logic in quantum-dot cellular automata (QCA)en_US
dc.typeConference Paperen_US
dspace.entity.typePublication
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