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Statistical Optimization Influence on High Permittivity Gate Spacer in 16nm DG-FinFET Device

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dc.contributor.authorRoslan A.F.en_US
dc.contributor.authorSalehuddin F.en_US
dc.contributor.authorZain A.S.M.en_US
dc.contributor.authorKaharudin K.E.en_US
dc.contributor.authorMohamad N.R.en_US
dc.contributor.authorMaheran A.H.A.en_US
dc.contributor.authorHaroon H.en_US
dc.contributor.authorRazak H.A.en_US
dc.contributor.authorIdris S.K.en_US
dc.contributor.authorAhmad I.en_US
dc.contributor.authorid57203514087en_US
dc.contributor.authorid36239165300en_US
dc.contributor.authorid55925762500en_US
dc.contributor.authorid56472706900en_US
dc.contributor.authorid55383652800en_US
dc.contributor.authorid36570222300en_US
dc.contributor.authorid35108985200en_US
dc.contributor.authorid57222550982en_US
dc.contributor.authorid57202632295en_US
dc.contributor.authorid12792216600en_US
dc.date.accessioned2023-05-29T09:41:33Z
dc.date.available2023-05-29T09:41:33Z
dc.date.issued2022
dc.description.abstractIn this paper, the effect of high permittivity gate spacer on short channel effects (SCEs) for the 16 nm double-gate finFET is investigated, with the output responses optimized using L9 orthogonal array (OA) Taguchi method. The determination is done through Signal-to-noise ratio to the effectiveness of the process parameters towards four output responses such as threshold voltage (VTH), drive current (ION), leakage current (IOFF) and Subthreshold Swing (SS). The virtual fabrication of the 16 nm double-gate fin FET was performed using ANTHENA module while the electrical characteristics of the device were simulated using ATLAS module. These two modules were combined with Taguchi method to aid in designing and optimizing the process parameters. The electrical characterization was performed and significant improvement could be seen on the TiO2 and HfO2 material in terms of the ION/IOFF ratio obtained at 4.03x106 and 3.61x106 respectively for 0.179�12.7% V of VTH. It can be observed that when approaching a higher value of dielectric constant (high-K), the ION increases while the SS and IOFF decreases. As conclusion, the output responses from high-K materials have been proven to meet the minimum requirement by International Technology Roadmap Semiconductor (ITRS) 2013 for high performance Multi-Gate technology for the year 2015. � 2022 College of Engineering, Universiti Teknologi MARA (UiTM), Malaysia.en_US
dc.description.natureFinalen_US
dc.identifier.epage162
dc.identifier.issue1
dc.identifier.scopus2-s2.0-85125867494
dc.identifier.spage145
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85125867494&partnerID=40&md5=d5902ba225b0985179efce6a9cb20946
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/27248
dc.identifier.volume19
dc.publisherUiTM Pressen_US
dc.sourceScopus
dc.sourcetitleJournal of Mechanical Engineering
dc.titleStatistical Optimization Influence on High Permittivity Gate Spacer in 16nm DG-FinFET Deviceen_US
dc.typeArticleen_US
dspace.entity.typePublication
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