Publication:
MATLAB and VHDL model of real time partial discharge detection using FPGA technology

dc.citedby1
dc.contributor.authorEmillianoen_US
dc.contributor.authorChakrabarty C.K.en_US
dc.contributor.authorRamasamy A.K.en_US
dc.contributor.authorGhani A.B.A.en_US
dc.contributor.authorid35974769600en_US
dc.contributor.authorid6701755282en_US
dc.contributor.authorid16023154400en_US
dc.contributor.authorid24469638000en_US
dc.date.accessioned2023-12-29T07:47:22Z
dc.date.available2023-12-29T07:47:22Z
dc.date.issued2011
dc.description.abstractThis research involves evaluating the use of FPGA for the detection and counting of partial discharge (PD) signals in underground cables (XLPE cables). PD detection model was designed one using MATLAB and another using VHDL. The pulse signal from the cable was processed and counted using peak detector and FPGA technology. The peak detector placed inside the VHDL program when the program of PD detection model was designed using VHDL program. Then, the model designed was used for testing and validation. Both models are able detect the PD signals and the results obtained are similar. � 2011 IEEE.en_US
dc.description.natureFinalen_US
dc.identifier.ArtNo6079262
dc.identifier.doi10.1109/ICOS.2011.6079262
dc.identifier.epage400
dc.identifier.scopus2-s2.0-83155178461
dc.identifier.spage395
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-83155178461&doi=10.1109%2fICOS.2011.6079262&partnerID=40&md5=73588a7c8d13ce99b9c62228aba2085e
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/30395
dc.pagecount5
dc.sourceScopus
dc.sourcetitle2011 IEEE Conference on Open Systems, ICOS 2011
dc.subject64 Bits BCD Counter with Reset Block
dc.subjectADC with Peak Detector Block
dc.subjectFPGA Simulation
dc.subjectFPGA Technology
dc.subjectMATLAB Model
dc.subjectPartial Discharge Detection
dc.subjectUnderground Cable
dc.subjectVHDL Model
dc.subjectCables
dc.subjectDetectors
dc.subjectPartial discharges
dc.subjectReal time systems
dc.subjectSignal detection
dc.subjectUnderground cables
dc.subject64 Bits BCD Counter with Reset Block
dc.subjectFPGA technology
dc.subjectMATLAB Model
dc.subjectPartial Discharge Detection
dc.subjectPeak detectors
dc.subjectVHDL-model
dc.subjectMATLAB
dc.titleMATLAB and VHDL model of real time partial discharge detection using FPGA technologyen_US
dc.typeConference paperen_US
dspace.entity.typePublication
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