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RF substrate noise characterization for CMOS 0.18?m

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dc.citedby4
dc.contributor.authorIshak I.S.en_US
dc.contributor.authorKeating R.A.en_US
dc.contributor.authorChakrabarty C.K.en_US
dc.contributor.authorid9942783300en_US
dc.contributor.authorid9943035200en_US
dc.contributor.authorid6701755282en_US
dc.date.accessioned2023-12-28T08:58:03Z
dc.date.available2023-12-28T08:58:03Z
dc.date.issued2004
dc.description.abstractIn the submicron technologies, RF noise isolation is becoming increasingly important. In this paper, the investigations of the on-chip RF isolation techniques were carried out. The chosen isolation structures were the Deep Nwell (or triple well isolation) and the P+ Guard Ring. The test structures were designed and fabricated using Silterra CMOS 0.18?m Mixed Signal process. The design parameter investigated was the distance between the isolation ring and the output terminal (Sout) in which the substrate coupling effects with and without deep nwell were characterized. � 2004 IEEE.en_US
dc.description.natureFinalen_US
dc.identifier.epage63
dc.identifier.scopus2-s2.0-29044444843
dc.identifier.spage60
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-29044444843&partnerID=40&md5=aa2dd07c688129917d55a6a5703a22ac
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/29885
dc.pagecount3
dc.sourceScopus
dc.sourcetitle2004 RF and Microwave Conference, RFM 2004 - Proceedings
dc.subjectDeep N-well (DNW)
dc.subjectGuard ring (GR)
dc.subjectRadio Frequency (RF)
dc.subjectSubstrate noise suppression
dc.subjectDesign
dc.subjectMicrowave isolators
dc.subjectRadio systems
dc.subjectSignal processing
dc.subjectCoupling effects
dc.subjectRF isolation techniques
dc.subjectSubmicron technologies
dc.subjectCMOS integrated circuits
dc.titleRF substrate noise characterization for CMOS 0.18?men_US
dc.typeConference paperen_US
dspace.entity.typePublication
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