Publication:
Impact of HALO structure on threshold voltage and leakage current in 45nm NMOS device

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dc.citedby2
dc.contributor.authorSalehuddin F.en_US
dc.contributor.authorAhmad I.en_US
dc.contributor.authorHamid F.A.en_US
dc.contributor.authorZaharim A.en_US
dc.contributor.authorid36239165300en_US
dc.contributor.authorid12792216600en_US
dc.contributor.authorid6603573875en_US
dc.contributor.authorid15119466900en_US
dc.date.accessioned2023-12-28T07:17:48Z
dc.date.available2023-12-28T07:17:48Z
dc.date.issued2010
dc.description.abstractIn this paper, we investigate the impact of process parameter like halo structure on threshold voltage (VTH) and leakage current (I Leak) in 45nm NMOS device. The settings of process parameters were determined by using Taguchi experimental design method. Besides halo implant, the other process parameters which used were Source/Drain (S/D) implant and oxide growth temperature. This work was done using TCAD simulator, consisting of a process simulator, ATHENA and device simulator, ATLAS. These two simulators were combined with Taguchi method to aid in design and optimize the process parameters. In this research, the most effective process parameters with respect to threshold voltage and leakage current are oxide growth temperature (71%) and S/D implant dose (47%) respectively. Whereas the second ranking factor affecting VTH and ILeak are halo implant tilt (15%) and halo implant dose (35%) respectively. As conclusions, S/D implant dose and oxide growth temperature have the strongest effect on the response characteristics. The results show that the VTH for NMOS device equal to 0.150V at tox= 1.1nm. The results show that ILeak after optimizations approaches is 51.8?A/m. � 2010 IEEE.en_US
dc.description.natureFinalen_US
dc.identifier.ArtNo5774934
dc.identifier.doi10.1109/APCCAS.2010.5774934
dc.identifier.epage1150
dc.identifier.scopus2-s2.0-79959277569
dc.identifier.spage1147
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-79959277569&doi=10.1109%2fAPCCAS.2010.5774934&partnerID=40&md5=569e86b1e1b1caaf3b07dec368cb8273
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/29629
dc.pagecount3
dc.sourceScopus
dc.sourcetitleIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
dc.subjectLeakage Current
dc.subjectNMOS Device
dc.subjectTaguchi Method
dc.subjectThreshold Voltage
dc.subjectGrowth temperature
dc.subjectLeakage currents
dc.subjectOptimization
dc.subjectSimulators
dc.subjectTaguchi methods
dc.subjectDevice simulators
dc.subjectHalo implants
dc.subjectHALO structure
dc.subjectNMOS devices
dc.subjectOxide growth
dc.subjectProcess parameters
dc.subjectProcess simulators
dc.subjectResponse characteristic
dc.subjectTaguchi
dc.subjectTaguchi experimental-design method
dc.subjectThreshold voltage
dc.titleImpact of HALO structure on threshold voltage and leakage current in 45nm NMOS deviceen_US
dc.typeConference paperen_US
dspace.entity.typePublication
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