Publication: Comparison reliability perfomance of single bit ECC and multi bit ECC for SLC NAND flash
Date
2025-07-17
Authors
Kong Kah Wai
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
NAND flash is a semiconductor product that commonly found in embedded system. It is a known as a type of none volatile memory where no power is required to maintain the data in memory. Manufacturer increases the array cell by using small transistor technology in wafer process.
As transistor technology is getting smaller, space between each array cell is reduced, which could lead to many interference issues as well as data integrity issue. It is important for developer to understand the effect of transistor shrink technology towards SLC NAND flash development. Problems such as data lost and program malfunction will easily occur in a product, if they are not taken care-off.
In this project an analysis on multi ECC bit and single ECC bit reliability performance of SLC NAND flash from two suppliers are carried out. The analysis of array cell reliability after 100K cycle or read write is carried out. More specifically, the "bit flip" effect due to the read and write test nearby cell is evaluated. It is observed that the multi- bit ECC SLC NAND flash suffers from this effect. The number of block errors in multi- bit ECC SLC NAND flash is higher compared with that of single-bit ECC SLC NAND flash. This observation is obtained for both manufacturers NAND flash.
The data retention capability in SLC NAND flashes is tested by exposing the NAND flash under high temperature aging. It is observed that the number of block errors started to be occurring when the temperature is increased above the working operation temperature. Similarly the multi bit ECC SLC NAND flash demonstrates worse. performance as a result of aging test. It is worth to note that, the multi-bit ECC NAND flash has smaller size, hence, higher number bit of ECC is employed to protect the data.
Bad block amount exist in both type of sample. Therefore, a bad block test is carried out to evaluate the effect of the transistor shrink SLC NAND flash. More specifically, the manufacturer bad block test is performed only on multi-bit NAND flash to capture the bad block that occurs during manufacturing. This result observed is verified by the manufacturer specifications. It is found out that the quality of NAND flash does degrade as advance transistor technology (smaller) is used. More specifically, during the manufacturing process of multi-bit NAND flash, manufacturer T used two block for testing the reliability of the NAND cell. Thus, the manufacturing bad block of each multi-bit NAND flash contains of two block errors. This experimental result drives attention to an embedded system developer to take necessary precaution in selecting related NAND flash as well as selecting related NAND management system in their product.
Description
TK7895 .K66 2014
Keywords
Computer storage devices , Flash memories (Computer)