Publication:
Implementation of low-cost reconfigurable external mixed-signal VLSI circuit testing system

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dc.citedby0
dc.contributor.authorIslam S.Z.en_US
dc.contributor.authorAli M.A.M.en_US
dc.contributor.authorid55432804400en_US
dc.contributor.authorid6507416666en_US
dc.date.accessioned2023-12-29T07:50:54Z
dc.date.available2023-12-29T07:50:54Z
dc.date.issued2010
dc.description.abstractThe optimisation of combined built-in self-test (BIST) and automatic test equipment (ATE) is desirable for complex fabricated chip testing to meet the high fault coverage while preserving acceptable costs. The fault coverage of BIST and ATE plays a significant role, because it can affect the area overhead in BIST and the test time in BIST/ATE. In this paper, a test circuit system (TCS) employing the hybrid technique (combined BIST/ATE) of test pattern generation is presented. The very large scale integration (VLSI) circuit testing features of the hybrid technique overcome the requirements for expensive ATE, as well as extra silicon area in BIST applications. The extendable input/output bus and IDDQ features for the TCS are also shown to enhance the testing capacity corresponding to recent VLSI circuit and system-on-chip requirements. � Institution of Engineers Australia, 2010.en_US
dc.description.natureFinalen_US
dc.identifier.doi10.1080/1448837X.2010.11464259
dc.identifier.epage82
dc.identifier.issue1
dc.identifier.scopus2-s2.0-78651369008
dc.identifier.spage73
dc.identifier.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-78651369008&doi=10.1080%2f1448837X.2010.11464259&partnerID=40&md5=652b782701d3e1393dcc3e2c8e883394
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/30656
dc.identifier.volume7
dc.pagecount9
dc.publisherInstitution of Engineers (Australia)en_US
dc.sourceScopus
dc.sourcetitleAustralian Journal of Electrical and Electronics Engineering
dc.subjectAutomatic testing
dc.subjectEquipment testing
dc.subjectIntegrated circuit testing
dc.subjectIntegration testing
dc.subjectMixed signal integrated circuits
dc.subjectReconfigurable hardware
dc.subjectSemiconductor device manufacture
dc.subjectSystem-on-chip
dc.subjectTiming circuits
dc.subjectVLSI circuits
dc.subjectAutomatic test equipment
dc.subjectCircuit testing
dc.subjectFabricated chips
dc.subjectFault coverages
dc.subjectHybrid techniques
dc.subjectReconfigurable
dc.subjectTest pattern generations
dc.subjectVery-large-scale integration circuits
dc.subjectBuilt-in self test
dc.titleImplementation of low-cost reconfigurable external mixed-signal VLSI circuit testing systemen_US
dc.typeArticleen_US
dspace.entity.typePublication
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