Publication: Development of UNITEN standard cell for sequential logic design
| dc.contributor.author | Muhammad Azim Abd Aziz | |
| dc.date.accessioned | 2024-10-23T08:19:06Z | |
| dc.date.available | 2024-10-23T08:19:06Z | |
| dc.date.issued | 2011 | |
| dc.description | TK7868.L6 M83 2011 | |
| dc.description.abstract | CMOS is an important technology nowadays. In CMOS technology the design is a crucial step where the design must meet all the required specifications before manufacturing process. Development of UNITEN Standard cell library for sequential logic design is a further improvement from the previous standard cell library for combinational logic design. Standard cell is a common layout style used for random logic. Sequential logic is logic circuit where the output depends on the previous input and current input, or also referred as state. This design will follow the specification from 0.18micron technology. According to0.18 micron technology there are two important level standard cells can be implemented that is transistor level and layout level. The transistor level will be implemented in the Microwind. The design will be added into the UNITEN Standard Cell Library for the reference of UNITEN student. | |
| dc.identifier.uri | https://irepository.uniten.edu.my/handle/123456789/34854 | |
| dc.language.iso | en | |
| dc.subject | Logic circuits | |
| dc.title | Development of UNITEN standard cell for sequential logic design | |
| dc.type | Resource Types::text::Final Year Project | |
| dspace.entity.type | Publication | |
| oaire.citation.endPage | 61 | |
| oaire.citation.startPage | 1 | |
| oairecerif.author.affiliation | #PLACEHOLDER_PARENT_METADATA_VALUE# |