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Design and implementation of hardware based protocol analyzer

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dc.contributor.affiliationen_US
dc.contributor.authorKok Lye Wahen_US
dc.date.accessioned2023-05-03T15:53:07Z
dc.date.available2023-05-03T15:53:07Z
dc.date.issued2002
dc.description.abstractThe product designed for this project is a hardware protocol analyzer. The implementation is carried out in two separate sub-projects: Namely, the implementation on the IXP1200 Network Processor and on the Xilinx XC40-005XL board. The implementation on the IXP 1200 network processor had to be limited to the simulation on the IXP12DE simulation software. The implementation of a protocol analyzer on the IXP 12DE can be done using the IXP microcode technology.en_US
dc.identifier.urihttps://irepository.uniten.edu.my/handle/123456789/21067
dc.language.isoenen_US
dc.titleDesign and implementation of hardware based protocol analyzeren_US
dc.typeResource Types::text::Thesisen_US
dspace.entity.typePublication
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